Although technically referring a semiconductor device having a metal gate electrode and an oxide gate insulator, the term “MOS transistor” is now commonly utilized (and is utilized herein) to refer to any semiconductor device including a conductive gate electrode (whether metal or other conductive material) positioned over a gate insulator (whether oxide or other insulator), which is, in turn, positioned over a semiconductor substrate. The gain of a MOS transistor, usually defined by the transconductance (gm), is proportional to the mobility (μ) of the majority carrier in the transistor channel. The current carrying capacity, and hence the performance of a MOS transistor, is proportional to the mobility of the majority carrier in the channel. The mobility of holes, the majority carrier in a P-channel MOS (PMOS) transistor, can be enhanced by embedding a compressive strain-inducing material, such as silicon germanium (SiGe), in the source/drain (S/D) regions of the semiconductor substrate adjacent the opposing channel ends. Conversely, the mobility of electrons, the majority carrier in an N-channel MOS (NMOS) transistor, can be increased by embedding a tensile strain-inducing material, such as carbon-doped silicon (SiC), in the S/D regions and adjacent the channel ends. Conventionally-known stress engineering methods are capable of greatly enhancing transistor performance by improving drive current and switching speed without increasing device size and capacitance.
Embedding of strain-inducing materials adjacent opposing channel ends results in the formation of interfaces between dissimilar materials (i.e., the silicon of the channel and the neighboring bodies of strain material) referred to as “heterojunctions.” When flowing from source to drain, the majority carriers are required to cross two such heterojunctions, one located adjacent the source end of the channel (the “source-side heterojunction”) and the other located adjacent the drain end of the channel (the “drain-side heterojunction”). The source-side heterojunction and the drain-side heterojunction are symmetrically positioned with respect to the channel. Depending upon device polarity, either the source-side heterojunction or the drain-side heterojunction will create an energy barrier opposing current flow. By way of example, FIG. 1 illustrates an energy band diagram for a simplified PMOS transistor 20 having a channel 22 underlying a gate stack 24 and extending from a source region 26 to a drain region 28. Both source region 26 and drain region 28 have been embedded with SiGe, as indicated in FIG. 1 by cross-hatching. When current flows from source region 26 to drain region 28 (represented by arrow 30), the majority carrier (holes) travels across source-side and drain-side heterojunctions 32 and 34, respectively. As indicated by the illustrated energy band wherein EC represents the conduction band, EV represents the valence band, and EG represents the bandgap, the valence energy of the majority carriers decreases when crossing source-side heterojunction 32 and increases when crossing drain-side heterojunction 34. When crossing source-side heterojunction 32, the majority carriers are required to overcome an energy barrier, which reduces current flow and decelerates carrier velocity. An analogous case occurs for an NMOS transistor wherein, when flowing from source to drain, the majority carriers (electrons) are required to overcome an increase the in band gap at the drain-side heterojunction formed between the silicon channel and the embedded strain-inducing material (e.g., SiC).
It would thus be desirable to provide embodiments of a strained semiconductor device fabrication method wherein the above-described heterojunction energy barrier is effectively eliminated to increase overall drive current and switching speed of the resultant device. It would also be desirable to provide embodiments of a strained semiconductor device produced pursuant to such a method. Other desirable features and characteristics of the present invention will become apparent from the subsequent detailed description and the appended Claims, taken in conjunction with the accompanying Drawings and the foregoing Technical Field and Background.